Abstract

In this study we have proposed minimized area and high speed EBCOT architecture for JPEG 2000. Embedded block coding with optimized truncation is an algorithm in JPEG 2000 image compression system. In several existing high speed EBCOT architecture is there in our proposed it overcomes and produce code generation. In our study open that image rate of more context dual generation is about 74.8%. To encoding the all image samples in a column, a new formulated named as pact context coding is invented as a important, high devised is used for less hardware. The proposed architecture is described in VHDL language, verified by simulation and successfully implemented in a Cyclone II and Stratix III FPGA. It provides a major reduction in memory access requirements, as well as a net increase of the processing speed as shown by the simulations. The C*D Quantizer coder is improved by the operating system and stage. The full design of processor encoder is tested on FPGA based. The results show that invented of the proposed architecture 172.28 M samples/sec is equaling to encode 1920*1080 (4:3:3) HD camera picture sequence at 39 f/sec. the bit plane architecture operates 315.06 MHZ which that implies that it is 4.03 times faster than the but plan coder so far. It is used many applications like satellite image, medical image and image compression system.

Keywords:

Architecture, bit plane coder, EBCOT, FPGA, JPEG 2000,

References

1. Acharya, T. and P.S. Tsai, 2004. JPEG 2000 Standard for Image Compression: Concepts, Algorithms and VLSI Architectures. John Wiley and Sons, Hoboken, New Jersey.
   CrossRef    
2. ISO/IEC 15444-1, 2000. Information Technology-JPEG 2000 Image Coding System-Part 1: Core Coding System, 2000.
   
3. JPEG Official Website, 2000. Retrieved from: ww.jpeg.org/jpeg2000.html.
   
4. Kishor, S. and B. Swapna, 2012. Area efficient, high speed EBCOT architecture for digital cinema. ISRN Signal Process., 2012(2012): 9, Article ID 714176.
   Direct Link
5. Lee, D.T., 2005. JPEG 2000: Retrospective and new developments. P. IEEE, 93(1): 32-41.
   CrossRef    
6. Pearlman, W.A., A. Islam, N. Nagaraj and A. Said, 2004. Efficient, low-complexity image coding with a set-partitioning embedded block coder. IEEE T. Circ. Syst. Vid., 14(11): 1219-1235.
   CrossRef    
7. Rabbani, M. and R. Joshi, 2002. An overview of the JPEG 2000 still image compression standard. Signal Process-Image, 17(1): 3-48.
   CrossRef    
8. Rhu, M. and I.C. Park, 2009. A novel trace-pipelined binary arithmetic coder architecture for JPEG2000. Proceeding of IEEE Workshop on Signal Processing Systems (SiPS, 2009), pp: 243-248.
   CrossRef    
9. Schelkens, P., A. Skodras and T. Ebrahimi, 2009. The JPEG 2000 Suite. J. Wiley, Hoboken, N.J.
   CrossRef    PMid:19994505    
10. Wang, R., B. Li, H. Jiang and H. Cao, 2008. High-throughput and hardware-efficient architecture of MQ arithmetic coder. Proceeding of the 11th IEEE Singapore International Conference on Communication Systems (ICCS, 2008), pp: 783-787.
    Direct Link
11. Wintner, R., 2006. Bits on the big screen. IEEE Spectrum, 43(12): 42-48.
    CrossRef    
12. Xiong, C.Y., J.W. Tian and J. Liu, 2005. Efficient word-level sequential coding scheme of bit plane coding for EBCOT in JPEG2000. Proceeding of the 9th International Symposium on Consumer Electronics, pp: 468-472.
    Direct Link

Competing interests

The authors have no competing interests.

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The authors have no competing interests.