Abstract

The present investigation aims at Design and implementation of the modules for Carry select adders benchmarking of the results by testing the efficiency of the modules/sub-modules development of improved methodologies for 16-bit carry select adder Comparison of the Gate Count of various Carry Select Adders. The implementation of 16-bit SQRT CSLA is done for all the 3 adders and its truth table and design is verified using the test-bench module. Test bench module includes simulating the designed circuitry for different kind of inputs and its output executable and waveform is verified. The implementation of each adder circuit is done according to its respective block diagram and verification is done based on module instantiation, propagation of each sub-module outputs based on hierarchy, carry propagation and selection from multiplexers outputs.

Keywords:

16-bit , circuit , carry select adder , input and output, module,

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Competing interests

The authors have no competing interests.

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The authors have no competing interests.