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2013 (Vol. 5, Issue: 06)
Article Information:

Design and Implementation of Digital Signal Transmission Performance Analyzer Based on FPGA

Guoping Zhang and Mande Xie
Corresponding Author:  Mande Xie 

Key words:  DSP builder, eye diagram, FPGA, low-pass filter, M sequence , ,
Vol. 5 , (06): 1991-1997
Submitted Accepted Published
July 12, 2012 September 03, 2012 February 21, 2013
Abstract:

Digital signal transmission analyzer is mainly used for testing the transmission quality of digital communications signal and it usually composed of digital signal generator, pseudo-random signal generator, low-pass filter and digital signal analysis circuit. This study adopts FPGA to implement the digital signal generator and pseudo-random signal generator, as well as to implement the shift register to generate the required M sequence. By changing the low-pass filter cutoff frequency and the amplitude of the pseudo-random signal to analog transmission environment and signal analysis portion consists of the digital signal analysis circuit. The digital signal analysis module extracts the sync signal and produces synchronization scan signal by using the synchronous clock, as the outside trigger signal of oscilloscope to display the eye diagram of the digital signal stably. To analyze the degree of interference and the strength of inter-symbol interference by observing the eye diagram, thus this study implements the performance test for digital signal transmission.
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  Cite this Reference:
Guoping Zhang and Mande Xie, 2013. Design and Implementation of Digital Signal Transmission Performance Analyzer Based on FPGA.  Research Journal of Applied Sciences, Engineering and Technology, 5(06): 1991-1997.
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ISSN (Online):  2040-7467
ISSN (Print):   2040-7459
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