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2012 (Vol. 4, Issue: 18)
Article Information:

Fault Model for Testable Reversible Toffoli Gates

Yu Pang, Shaoquan Wang, Zhilong He and Qiangbing Zhang
Corresponding Author:  Yu Pang 

Key words:  Quantum cost, reversible logic, stuck-at fault model, test vector, toffoli gate, ,
Vol. 4 , (18): 3470-3475
Submitted Accepted Published
April 23, 2012 May 18, 2012 September 15, 2012
Abstract:

Techniques of reversible circuits can be used in low-power microchips and quantum communications. Current most works focuses on synthesis of reversible circuits but seldom for fault testing which is sure to be an important step in any robust implementation. In this study, we propose a Universal Toffoli Gate (UTG) with four inputs which can realize all basic Boolean functions. The all single stuck-at faults are analyzed and a test-set with minimum test vectors is given. Using the proposed UTG, it is easy to implement a complex reversible circuit and test all stuck-at faults of the circuit. The experiments show that reversible circuits constructed by the UTGs have less quantum cost and test vectors compared to other works.
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  Cite this Reference:
Yu Pang, Shaoquan Wang, Zhilong He and Qiangbing Zhang, 2012. Fault Model for Testable Reversible Toffoli Gates.  Research Journal of Applied Sciences, Engineering and Technology, 4(18): 3470-3475.
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ISSN (Online):  2040-7467
ISSN (Print):   2040-7459
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